NETWORK ON-CHIP AND ITS RESEARCH CHALLENGES

K., Paramasivam (2015) NETWORK ON-CHIP AND ITS RESEARCH CHALLENGES. ICTACT Journal on Microelectronics, 01 (02). pp. 83-87. ISSN 23951672

[thumbnail of IJME_paper_7_pp_83_87.pdf] Text
IJME_paper_7_pp_83_87.pdf - Published Version

Download (278kB)

Abstract

Networks-On-Chip (NoCs) have been proposed as a promising solution for power, performance demands and scalability of next generation Systems-On-Chip (SOCs) to overcome the several challenges of current SoC with conventional architecture. In this article, NoC, its architecture and features are presented. Further the article is extended with research challenges. Major areas of scope for research are addressed briefly with the view that microelectronic field researchers get benefitted. Performance analysing parameters and simulation tools for NoC are also included. Future SoC design needs lot of innovations and creativity to explore its complete features. Research on NoC is mandatory at this critical juncture.

Item Type: Article
Subjects: Impact Archive > Multidisciplinary
Depositing User: Managing Editor
Date Deposited: 18 Oct 2023 04:02
Last Modified: 18 Oct 2023 04:02
URI: http://research.sdpublishers.net/id/eprint/2663

Actions (login required)

View Item
View Item